Input type: DC input, positive common end.
Input points: 8 points.
Enter the response time: 10ms the following.
Rated input voltage / current: DC24V/7mA.
Output form: transistor output, leakage type.
Output points: 8 points.
OFF leakage current: 0.1mA.
Output protection function: No AX81C.
Rated load voltage / current: DC12V/DC24V/0.5A.
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External connection: 2 line /2 line type.
Type of input and output terminal.
Using 2 pieces of structure of the terminal units, maintenance can be maintained in the same line under the condition of the replacement module AX81C. Input points: 16 points.
Voltage: DC100/110/125V.
Current: 2mA.
Response time: 20ms.
8 points / a common end.
Positive / negative sharing.
20 point terminal station.
Each scanning process AX81C. Focus on the input signal sampling. Focus on the output signal to refresh.
Input refresh process. When the input port is closed,
Program in the implementation phase, the input end of a new state, the new state can not be read.
Only when the program is scanned, the new state is read MITSUBISHI AX81C.
A scan cycle is divided into the input sample, the program execution, the output refresh.
The contents of the component image register are changed with the change of the execution of the program.
The length of the scan cycle is determined by the three.
CPU the speed of executing instructions MITSUBISHI AX81C.
Time of instruction.
Instruction count.
Due to the adoption of centralized sampling.
Centralized output mode.
There exist input / output hysteresis phenomena, i.e., the input / output response delay.
PLC selection with the development of PLC technology, more and more types of PLC products,
Function is becoming more and more perfect, and its application is more and more extensive MITSUBISHI AX81C.
Different series of different models of PLC has different performance, applicable occasions also have different emphasis,
Price also has a greater difference. Therefore PLC selection,
Under the premise of meeting the control requirements,
Should consider the best performance to price ratio, a reasonable choice of PLC.
System program memory for storing system program,
Including management procedures, monitoring procedures, as well as the user program to do the compiler to compile the process of interpretation.
Read only memory. Manufacturers use, content can not be changed, power does not disappear.
Input points: 32 points.
Input voltage: DC12/24V.
Current: 3/7mA.
Response time: 10ms.
Positive / negative sharing.
50 point terminal station.
System program memory for storing system program,
Including management procedures, monitoring procedures, as well as the user program to do the compiler to compile the process of interpretation.
Read only memory. Manufacturers use, content can not be changed, power does not disappear.
PLC selection with the development of PLC technology, more and more types of PLC products,
Function is becoming more and more perfect, and its application is more and more extensive.
Different series of different models of PLC has different performance, applicable occasions also have different emphasis,
Price also has a greater difference. Therefore PLC selection,
Under the premise of meeting the control requirements,
Should consider the best performance to price ratio, a reasonable choice of PLC.
Each scanning process. Focus on the input signal sampling. Focus on the output signal to refresh.
Input refresh process. When the input port is closed,
Program in the implementation phase, the input end of a new state, the new state can not be read.
Only when the program is scanned, the new state is read.
A scan cycle is divided into the input sample, the program execution, the output refresh.
The contents of the component image register are changed with the change of the execution of the program.
The length of the scan cycle is determined by the three.
CPU the speed oof executing instructions AX81C.
Time of instruction.
Instruction count.
Due to the adoption of centralized sampling.
Centralized output mode.
There exist input / output hysteresis phenomena, i.e., the input / output response delay.